Design And FPGA Simulation Of 4-Term Floating Point Adder With Single Normalization. International Journal of Engineering and Science Research, [S. l.], v. 16, n. 3, p. 58–62, 2026. Disponível em: https://ijesr.org/index.php/ijesr/article/view/1760. Acesso em: 26 jul. 2026.